As demands for displays with high-resolution are increasingly high, requirements on process capacity of a high-resolution display product are also getting higher and higher. Therefore, requirements on time effectiveness of testing the process capability in the process of manufacturing displays are increased.
Especially for a polysilicon display device, such as a top gate type polysilicon display, the process is complicated due to multiple times of exposure in the process of manufacturing displays. If a defective of process cannot be immediately detected in the manufacturing process, it may cause a great waste in the cost and time of manufacturing. Thus, monitoring for the stability and accuracy of the process needs to be performed in the process or after the end of the process.
Currently, during the monitoring for the stability and accuracy of process in the process of manufacturing a display product, a test unit is typically fabricated in a non-display region of the display product. A width of a signal line and an overlapping between a upper conducting film and a lower conducting film in the test unit are detected, to detect the stability and accuracy of the process of manufacturing each of film layers in a display region. Moreover, the performance of a transistor in the display region can be detected by testing characteristics of a long channel transistor and a short channel transistor in the test unit, so that the defective in the process can be found timely by the test unit to reduce the waste in the manufacturing cost.
In the existing test unit, multiple test elements are disposed in different layers of the non-display region. Among these test elements, the test element for testing the width of the signal line, the test element for testing the overlapping between a upper conducting film and a lower conducting film, and the element for testing the characteristic of a long channel transistor and a short channel transistor are provided independently. These test elements are dispersedly distributed in the non-display region. Therefore, a large space in the non-display region is occupied by the test elements. It is disadvantageous for saving the manufacturing cost. Moreover, it needs to move testing equipment (such as optical testing equipment and electrical testing equipment) frequently to test different process parameters. The test efficiency is reduced greatly while the test cost is also increased.
It should be noted that, information disclosed in the above background portion is provided only for better understanding of the background of the present disclosure, and thus it may contain information that does not form the prior art known by those ordinary skilled in the art.